Operational Overview Of CPU
Any processing executed by central processing unit is directed by the instruction. The processing required for a single instruction is called an instruction cycle. The four steps which the CPU carries out for each machine language instruction are fetch, decode, execute, and store (Fig. 1.6).
The steps involved in the instruction cycle while executing a program are described below. The Program Counter (PC) is the register that keeps track of what instruction has to be executed next. At the first step, the instruction is fetched from main memory and loaded into Instruction Register (IR), whose address is specified by PC register. Immediately the PC is incremented so that it points to the next instruction in the program. Once in IR, the instruction is decoded to determine the actions needed for its execution. The control unit then issues the sequence of control signals that enables execution of the instruction. Data needed to be processed by the instructions are either fetched from a register from RAM through an address register. The result of the instruction is stored (written) to either a register or a memory location. The next instruction of a program will follow the same steps. This will continue until there is no more instruction in the program or the computer is turned off, some sort of unrecoverable error occurs.
A register is a single, permanent storage location within the CPU used for a particular, de?ned purpose. CPU contains several important registers such as
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- The program counter(PC) register holds the address of the current instruction being executed.
- The instruction register (IR) holds the actual instruction being executed currently by the computer. To access data in memory, CPU makes use of two internal registers:
- The memory address register (MAR) holds the address of a memory location.
- The memory data register (MDR), sometimes known as the memory buffer register, will hold a data value that is being stored to or retrieved from the memory location currently addressed by the memory address register.