Program Counter



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The memory address register (AR) has 12 bits since this is the width of a memory address. The program counter (PC) also has 12 bits and it holds the address of the next instruction to be read from memory after the current instruction is executed. The PC goes through a counting sequence and causes the computer to read sequential instructions previously stored in memory. Instruction words are read and executed in sequence unless a branch instruction is encountered. A branch instruction calls for a transfer to a nonconsecutive instruction in the program. The address part of a branch instruction is transferred to PC to become the address of the next instruction. To read an instruction, the content of PC is taken as the address for memory and a memory read cycle is initiated. PC is then incremented by one, so it holds the address of the next instruction in sequence.

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1 operation code link
2 Stored Program Organization link
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3 Instruction Codes link
4 Indirect Address link
5 Computer Registers link

Two registers are used for input and output. The input register (INPR) receives an 8-bit character from an input device. The output register (OUTR) holds an 8-bit character for an output device.

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1 ADD to AC link
2 LDA: Load to AC link
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3 STA: Store AC & BUN: Branch Unconditionally link
4 BSA: Branch and Save Return Address link
5 BSA: Branch and Save Return Address -subroutine call link

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1 Error Detection Codes link
2 Error Detection Codes-2 link
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3 Register Transfer Language link
4 Register Transfer Language -2 link
5 Register Transfer link

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Rating - 3/5