LDA: Load to AC
This instruction transfers the memory word specified by the effective address to AC. The rnicrooperations needed to execute this instruction are:
D2T4: DR <--- M [AR]
D2T5: AC <--- DR, SC <--- 0
Looking back at the bus system shown in Fig. 5-4 we note that there is no direct path from the bus into AC. The adder and logic circuit receive information from DR which can be transferred into AC. Therefore, it is necessary to read the memory word into DR first and then transfer the content of DR into AC. The reason for not connecting the bus to the inputs of AC is the delay encountered in the adder and logic circuit. It is assumed that the time it takes to read from memory and transfer the word through the bus as well as the adder and logic circuit is more than the time of one clock cycle. By not connecting the bus to the inputs of AC we can maintain one clock cycle per rnicrooperation.